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500 ma pwm step-down dc-dc with synchronous rectifier ADP3051 rev. 0 in fo rmation furn ished by an alog d e v i c e s is believed to be accurate and reliable. how e ver, n o resp on sibili ty is assume d b y a n alog de vices fo r its use, nor for an y i n fri n geme nt s of p a t e nt s or ot h e r ri ght s o f th ird parties th at may result fro m its use . specifications subject to chan g e witho u t n o tice. no licen s e is g r an te d by implicatio n or ot herwi s e u n der a n y p a t e nt or p a t e nt ri ghts of analog de v i ces. trademarks an d registered tra d ema r ks are the prop erty o f their respective ow ners. one technolog y way, p.o . box 9106, norwood, ma 02062-9106, u.s.a. t e l: 781. 329. 4 700 www.analog.com fax: 781. 326. 87 03 ? 2004 analog de vices, i n c. al l r i ght s r e ser v ed . features current mode control for sim ple loop compensation input voltage r a nge: 2.7 v to 5 . 5 v output voltage range: 0.8 v to 5.5 v tri-mode? ope r ation for high efficiency 550 k hz p w m operating frequency high accuracy over line, loa d , and temperat ure microp ower shu t d o wn mod e space-saving msop-8 package applic ati o ns li-ion powered handhelds mp3 players pdas and palm to ps consumer elec tronics general description the ad p3051 is a lo w n o is e , c u r r en t m o de , p u ls e wid t h m o d u - l a tor ( p w m ) st e p - d ow n c o n v e r te r c a p a bl e of s u pply i n g ove r 500 ma t o o u t p u t v o l t a g es as lo w as 0.8 v . this de vice in teg r a t es a lo w r e sis t a n ce p o w e r swi t c h and sy n c hr on o u s r e c t if ier , p r o v id- in g exce l l en t ef f i cien c y o v er t h e en t i r e o u t p u t vol t a g e ra n g e and e l imin a t i n g t h e n e e d fo r a la rge a nd cost ly ext e r n a l s c h o t t k y r e c t if ier . i t s 550 kh z s w i t c h in g f r eq uen c y p e r m i t s th e us e o f sm all ext e rn al co m p o n en t s . c u r r en t m o de c o n t r o l a nd ext e r n al co m p en s a t i o n al lo w t h e r e gula t o r t o be easil y o p timize d f o r a wid e ra n g e o f o p era t in g co ndi tion s. th e ad p3051 o p era t es a t a co n s tan t 550 kh z f r e q uen c y a t m e di u m t o he a v y l o ads; i t sm o o t h ly tra n si tio n s in t o t r i-m o de op era t ion t o s a ve p o w e r a t lig h t lo ads. a p i n - co n t r o l l ed micro p o w er s h u t down m o de is als o in c l uded . the ad p3051 s 2.7 v t o 5.5 v in p u t o p er a t in g ran g e ma k e s i t ide a l fo r b o t h b a t t e r y -p o w er e d a p plic a t ion s as w e l l as t h os e wi t h 3.3 v o r 5 v s u p p l y b u s e s. i t is a v a i lab l e in a s p ace-s a vin g , 8-lead mso p p a c k a g e. ty pical a p plicati o n circuit a d p 3051 in v in 3.3v sw pgnd gnd comp fb shdn 10 h 12.5k ? 10k ? 10k ? 27pf 10 f 270pf 10 f v out 1.8v 4 7 28 6 3 5 04768-0-001 fi g u r e 1 .
ADP3051 rev. 0 | page 2 of 16 table of contents specifications ..................................................................................... 3 absolute maximum ratings ............................................................ 4 esd caution .................................................................................. 4 pin configuration and function descriptions ............................. 5 typical performance characteristics ............................................. 6 theory of operation ........................................................................ 9 pwm control mode .................................................................... 9 tri-mode operation ..................................................................... 9 100% duty cycle operation ..................................................... 10 shutdown ..................................................................................... 10 undervoltage lockout (uvlo) ............................................... 10 short-circuit protection and recovery ................................... 10 applications ..................................................................................... 11 recommended components .................................................... 11 design procedure ....................................................................... 11 output capacitor selection ....................................................... 12 circuit board layout considerations ...................................... 13 outline dimensions ....................................................................... 15 ordering guide .......................................................................... 15 revision history 6/04revision 0: initial version
ADP3051 rev. 0 | page 3 of 16 specifications 1 v in = 3.6 v @ t a = C40c to +85c, unless otherwise noted. table 1. parameter conditions min typ max unit supply input voltage range 2.7 5.5 v quiescent supply current v fb = 1.0 v 180 300 a shutdown supply current shdn = 0 v 10 25 a pwm comparator minimum duty ratio 0 % maximum duty ratio 100 % oscillator oscillator frequency v comp 1.5 v, v out = 0.7 v 410 550 690 khz foldback frequency v out < 0.3 v 200 khz output stage on resistance, n channel i sw = 150 ma 150 m? switch leakage current, n channel v in = 5.0 v, v sw = 0 v 1 a on resistance, p channel fb = gnd 190 m? switch leakage current, p channel v sw = 5.0 v 1 a current limit threshold 680 1000 1320 ma error amplifier t a = 25c 783 800 821 mv feedback regulation voltage 770 830 mv feedback input bias current 5 na current sense gain 2.9 ? transconductance 0.32 ms maximum sink current 33 a maximum source current 33 a undervoltage lockout undervoltage loc kout threshold v in rising 1.9 2.6 v undervoltage lockout hysteresis 55 mv shdn input threshold voltages input high threshold voltage re ferenced to in ?0.5 v input low threshold voltage 0.4 v 1 all limits at temperature extremes ar e guaranteed via correlation using standard statistical quality control (sqc).
ADP3051 rev. 0 | page 4 of 1 6 absolute maximum ra tings table 2. p a r a m e t e r r a t i n g in, shdn , comp, sw, fb to gnd C0.3 v to +6 v sw to in C6 v to +0.3 v pgnd to g n d C0.3 v to +0.3 v operating ambient temperature C40c to +85c operating junct i on temperature C40c to +125c storage temperature C65c to +150c ja , 2-layer (se m i standard board) 159c/w ja , 4-layer (jed ec standard board) 116c/w lead temperature range soldering (10 sec) 300c vapor phase (60 sec) 215c infrared (15 sec) 220c s t r e s s es a b o v e t h os e lis t e d u n de r a b s o l u t e m a xi m u m r a t i n g s ma y c a us e p e r m a n en t dama ge t o t h e de vice . this is a s t r e s s ra t - i n g on ly ; f u nc t i on a l op e r a t i o n of t h e d e v i c e a t t h e s e or a n y o t h e r con d i t io ns a b o v e t h o s e i ndic a te d i n t h e op er a t io na l s e c - t i o n s o f t h is sp e c if ica t ion is n o t im plie d . e x p o sur e t o a b s o l u t e max i m u m ra t i ng co ndi t i on s fo r ex ten d e d p e r i o d s ma y a f fe c t de vice r e l i ab i l i t y . a b s o l u te max i m u m ra t i n g s a p ply in d i vid u a l ly o n ly , n o t i n com b in a t ion. u n less o t h e r w is e sp e c i f ie d , a l l o t h e r volt age s are re fe re nc e d to g n d . esd c a ution esd (electrostatic discharge) sensitive device. ele c tros tatic charg e s as high as 4000 v readily accumulate on the human body and test eq uipment and can discharge with out detection. although th is product features pro- prietary esd protection circuitry, permanent damage ma y occur on devices sub j ected to high energy electro- static discharge s . therefore, pro p er esd precautions are recommended to avoid performance degradation or loss of functionality.
ADP3051 rev. 0 | page 5 of 1 6 pin conf igura t ion and fu nction descriptions ADP3051 top view (not to scale) 1 2 3 4 8 7 6 5 nc pgnd sw in gnd shdn comp fb 04768-0-021 f i g u re 2. 8-l e ad m s op pin conf ig u r at ion ta ble 3. pi n f u nct i on d e s c ri pt i o ns pin o. mnemonic description 1 nc no connect. not internally connected. 2 p g n d power ground. connect pgnd t o gnd at a single point. us e se p a rate power gr o u nd and quiet ground planes fo r the power and sensitive an alog circuitry, respec tively. see the circuit board layout considerations section. 3 s w switching output. sw connects to the drain of t h e inte rnal power switch and sy nchron ous recti f ier. connect the output induc t or between sw and the load. 4 i n power source input. in is the source of the high sid e p-channe l m o sfet switch, and supplie s the internal p o we r to the ADP3051. b y pass in to gnd with a 0.1 f or greater ce ramic capacitor , place d as close as possible to in. 5 f b feedback volta g e sense input. fb sens es the output voltage. t o set the outp ut voltage, conn e c t a resistive vo lt- age divider from the output vo ltage to fb. the feedback threshold is 0.8 v. see th e setting the output voltage section. 6 c o m p feedback loo p compen sation node. comp is t h e output of the internal tran sconductance error amplifier. place a series rc network from comp t o gn d to compensate the regulator. see th e compensation design section. 7 shdn shutdown input. drive shdn low to turn off the adp3 051; drive shdn to within 0.5 v of v in to turn on the ADP3051. see the shutdown se ction. 8 g n d g r o u n d .
ADP3051 rev. 0 | page 6 of 1 6 typical perf orm ance cha r acte ristics v in = 3.6v , v ou t = 3.3v , cir c ui t o f f i gur e 20, co m p on en t val u es o f t a b l e 4, t a = 25c, un less o t h e r w is e sp e c if ie d . 40 50 60 70 80 90 100 e fficie ncy (%) i load (ma) 1 100 10 1000 04768-0-002 v in = 3.6v v in = 5.5v v out = 3.3v l = 22 h f i gure 3. o u tput e f fici enc y v s . l oad cu rr e n t, v ou t = 3. 3 v 40 50 60 70 80 90 100 e fficie ncy (%) i load (ma) 1 100 10 1000 04768-0-003 v in = 3.6v v in = 2.7v v in = 5.5v v out = 2.5v l = 22 h c out = 22 f f i gure 4. o u tput e f fici enc y v s . l oad cu rr e n t, v ou t = 2. 5 v 40 50 60 70 80 90 100 e fficie ncy (%) i load (ma) 1 100 10 1000 04768-0-004 v in = 2.5v v in = 3.6v v in = 5.5v v out = 1.2v l = 10 h c out = 22 f f i gure 5. o u tput e f fici enc y v s . l oad cu rr e n t, v ou t = 1. 2 v ?0.5 ?0.4 ?0.3 ?0.2 ?0.1 0 0.1 0.2 0.3 0.4 0.5 outp ut accuracy (%) 0 100 200 300 400 500 i load (ma) 04768-0-005 v out = 2.5v v in = 3.6v fi g u r e 6 . o u t p u t v o l t a g e e r ror v s . l oad current 480 500 520 540 560 580 600 fre q ue ncy (k hz) ? 4 0 ? 15 10 35 60 85 temperature ( c) 04768-0-006 v in = 2.7v v in = 5.5v v in = 3.6v v out = 1.2v i load = 500ma f i g u re 7. o s c i l l at or f r equ e nc y v s . t e m p er at u r e 0 100 200 150 50 300 250 os cillator fre q ue ncy (k hz) 400 350 500 450 600 550 0 100 200 300 400 500 i load (ma) 04768-0-007 f i g u re 8. o s c i l l at or f r equ e nc y v s . l oad current , v in = 3.6 v , v ou t = 1.2 v
ADP3051 rev. 0 | page 7 of 1 6 04768-0-008 ch1 = v in , ch2 = sw, ch3 = v out , ch4 = i l (1a/div) v in = 3.6v, v out = 1.2v, i load = 500ma fi g u r e 9 . s t a r t - u p b e h a v i o r 04768-0-009 ch2 = i l (100ma/div), ch4 = sw v in = 3.6v, v out = 2.5v, l = 22 h, i out = 50ma f i gure 1 0 . li ght l o a d s w it ch i n g w a v e fo rm s 04768-0-010 ch2 = i l (500ma/div), ch4 = sw v in = 3.6v, v out = 2.5v, l = 22 h, i out = 500ma f i g u re 11. h e av y l oad sw it chi n g w a vef o r m s 04768-0-011 ch1 = comp, ch3 = v out , ch4 = i load (50ma to 490ma) v in = 3.6v, v out = 2.5v, c out = 22 f, c c = 150pf, r c = 100k ? f i gur e 1 2 . l o a d t r ansi ent respo n se 04768-0-012 ch1 = v in , ch2 = v out v in = 3v to 4v, v out = 2.5v, i load = 500ma f i gur e 1 3 . li ne t r a n si ent resp onse 110 120 130 140 150 160 170 180 190 200 210 r ds on (m ? ) 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 supply voltage (v) 04768-0-013 v out = 2.5v i out = 500ma nmos pmos f i gure 14. s w itch o n r e sistance v s . inp u t v o ltag e
ADP3051 rev. 0 | page 8 of 1 6 60 80 100 120 140 160 180 200 220 240 s u p p l y curre nt ( a) 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 supply voltage (v) 04768-0-014 v out = 1.2v i load = 0ma t a = +85c t a = +25 c t a = ? 40 c f i gure 15. q u ies c e n t current v s . input v o lt age 700 750 800 850 900 950 1000 1050 1100 1150 1200 curre nt limit (a) ? 4 0 ? 15 10 35 60 85 temperature ( c) 04768-0-015 v in = 2.7v v in = 3.6v v in = 5.5v v out = 1.2v f i gure 1 6 . c u rr ent l i mi t vs . input v o l t age , v ou t = 1 . 2 v
ADP3051 rev. 0 | page 9 of 1 6 theor y of opera tion the ad p3051 is a m o n o l i thic c u r r en t m o de b u c k con v er t e r wi t h an in t e g r a t e d hig h -side s w i t c h an d lo w-side sy n c hr on o u s r e c t if ier . i t o p era t es wi t h in p u t v o l t a g es betw een 2.7 v an d 5 . 5 v , re g u l a te s an output volt ag e dow n to 0 . 8 v , a n d s u ppl i e s more tha n 500 ma o f lo ad c u r r en t. th e ad p3051 f e a t ur es p a t e n t e d t r i - m o d e te ch nol o g y to op e r a t e i n f i xe d f r e q u e nc y p w m mo d e a t m e di u m t o he a v y lo ads. this im p r o v es lig h t-lo ad ef f i cien c y b y sm oo thl y tra n si ti o n in g in t o a v a ri a b le f r eq ue n c y pw m m o de , an d in t o a sin g le-p u l s e , c u r r en t-limi t e d v a r i a b le f r e q uen c y m o de a t v e r y lig h t lo ads. p w m c o ntrol mode a t m o dera te t o hig h o u t p u t c u r r en ts, the ad p3 051 o p era t es i n a fi x e d fr e q u e n c y , p e ak c u r r e n t c o n t r o l m o d e t o r e g u l a t e t h e out p ut vol t ag e. a t t h e b e g i nn i n g of e a ch c y cl e, t h e p - chan nel output s w itch tu r n s on an d re m a i n s o n u n t i l t h e i n d u c t or c u r - r e n t exce e d s t h e t h r e s h old s e t b y t h e v o l t a g e a t c o mp . w h en t h e p - chan nel s w itch t u r n s of f, t h e n-chan nel s y nchronou s r e ctif ier t u r n s o n f o r th e r e ma in d e r o f the c y c l e , a f t e r which t h e cy c l e r e p e a t s . i n c u r r en t m o de , tw o cas c aded co n t r o l lo o p s co m b in e t o r e gu - la te t h e o u t p u t vol t a g e . th e ou t e r v o l t a g e co n t r o l lo o p s e n s es t h e v o l t a g e a t fb and co m p a r es i t t o t h e i n t e r n al 0.8 v r e fer e n c e . the i n t e r n a l t r an s c on d u c t ance a m plif ier fo r c es a c u r r en t a t c o mp p r o p o r t i o n al t o t h e v o l t ag e dif f er en ce b e tw e e n t h e r e fer - en c e an d f b . by s e le c t in g t h e com p on e n ts b e twe e n c o m p an d gnd , the f r e q uen c y c h a r ac t e r i stics o f th e con t r o l sys t em g i v e a st abl e re g u l a t i on s y ste m . the inn e r p e ak- c ur r e n t co n t r o l lo o p m o ni t o rs t h e c u r r en t f l o w - in g t h r o ug h t h e p - cha n nel mosf et a nd con v er ts t h a t to a vol t age. t h i s vol t age i s i n te r n a l l y c o m p are d to t h e vol t age a t c o mp , w h ich s e ts i n d u c t o r p e a k c u r r en t. t h e e r r o r a m plif ier , a nd t h us t h e o u t p u t v o l t a g e , con t r o ls t h e i n d u c t o r p e ak c u r r en t to re g u l a t e t h e out p ut volt ag e. a n i n te r n a l ly ge ne r a te d sl op e c o m p e n s a t i on c i rc u i t e n su re s t h a t t h e i n n e r c u r r e n t c o n t ro l lo o p ma in t a in s st a b le o p era t ion o v er t h e en t i r e in p u t an d o u t p ut vol t age r a ng e. tri-mo de o p er a t ion the ad p3051 fea t ur es p a t e n t e d t r i-m o de techn o log y whic h a l l o w s fi x e d - fr e q u e n c y , c u r r e n t m o d e , p w m o p e r a t i o n a t m e di u m and h e a v y lo ads; sm o o thl y tra n si tio n s t o va r i a b le f r e q uen c y pwm o p era t ion t o im p r o v e lig h t-l o ad ef f i cien c y ; a nd o p era t es in a sing le-p u l s e , c u r r e n t-limi t e d va r i ab le f r e q uen c y m o de a t v e r y lig h t lo ads. th es e t h r e e mo des w o rk t o g e t h er t o p r o v ide hig h ef f i cien c y o v er a w i de ra n g e o f lo ad c u r r en t co ndi - ti o n s w i t h o u t t h e f r eq ue n c y j i t t er , i n cr ea se d o u t p u t v o l t a g e r i p p le , a nd a u dib l e n o i s e g e n e ra t i o n exhib i t e d b y o t h e r lig h t - lo ad co n t r o l s c hem e s. the ad p3051 s in t e r n al os cil l a to r is a k e y co m p o n en t o f i t s t r i-m o d e o p er a t io n. u nder me di u m - h e a v y lo ad con d i t io n s , t h e os cil l a t o r o p er a t es a t a con s t a n t 550 kh z. u n der lig h t-lo ad co ndi t i on s, t h e o s ci l l a t o r f r e q ue n c y is de cr e a s e d to min i m i z e sw i t ch in g loss es , t h us im p r o v ing lig h t-lo ad ef f i cien c y . a t v e r y lig h t lo ads, th e os cil l a t o r is dis a b l ed and t h e ad p3051 swi t ch es o n l y as r e q u ir ed t o s u p p l y th e lo ad c u r r en t f o r g o o d lig h t-lo ad e ffi c i e n c y . i n addi t i on t o t r i-m o de o p er a t i o n, t h e ad p305 1 o p era t es in t h e 200 kh z f r eq uen c y f o ld bac k mo de w h en t h e vol t a g e a t fb is b e lo w 0.3 v fo r enhan c e d co n t r o l o f t h e i n d u c t o r c u r r en t un de r sh o r t-cir c ui t and st a r t u p con d i t io n s . s e e t h e sho r t-cir c ui t pr o - te c t io n and re c o ver y s e c t io n. uvlo control logic oscillator 0.4v voltage reference in sw pgnd gnd nc fb c omp shdn current sense gate drivers ADP3051 0.8v error amplifier g m pwm comparator frequency foldback comparator s r q 4 3 2 7 6 5 18 04768-0-016 f i g u re 17. si mpl i f i e d bl ock d i ag r a m
ADP3051 rev. 0 | page 10 of 16 100% duty cy cle oper a t ion the ad p3051 is ca p a b l e o f o p era t in g a t 100 % d u ty c y c l e , al lo w- in g i t t o r e gu la te o u t p ut v o l t a g es t h a t a r e v e r y clos e t o t h e i n p u t v o l t a g e . i n 100 % d u ty c y cle o p era t io n, t h e p - cha n n e l s w i t ch re m a i n s c o n t i n u o u sly on , and t h e d r op out vo lt age i s s i m p ly t h e output c u r r e n t m u lt ipl i e d by t h e on re s i st a n c e of t h e i n te r n a l swi t ch an d in d u c t o r , typ i cal l y 200 mv a t f u l l lo ads (500 ma). shutdo w n the ad p3051 is ena b led an d dis a b l ed via i t s sh dn in p u t. sh dn e a si l y in t e r f ace s t o o p en-dra i n a nd t h r e e- s t a t e l o g i c gp i o s. t o ena b le th e ad p3051, dr i v e sh dn t o wi thin 0.5 v o f th e v o l t a g e a t i n ; t o dis a b l e t h e ad p3051, dr iv e sh dn be l o w 0.4 v . the cir c ui t o f f i gur e 18 s h o w s a sim p le mea n s o f dr i v in g sh dn t o t h e p r o p er hig h and lo w in pu t s t a t es i n c a s e s w h er e n o o p en- d ra i n o r t h r e e-s t a t e gp io is a v a i la b l e. ADP3051 in shdn 100k ? shdn control 04768-0-017 f i gure 18. sh u t do w n cont r o l c i rcuit underv ol t a ge l o ck out (u vl o ) the ad p3051 in c l udes an in t e r n al un der v ol ta ge lo c k o u t (uvl o) cir c ui t t h a t t u r n s o f f t h e co n v er t e r if t h e in p u t v o l t a g e dr o p s b e lo w t h e 2.2 v uvl o t h r e sh ol d . this p r e v en ts un con t r o l l e d b e ha vio r if t h e in pu t v o l t a g e dr o p s b e lo w t h e 2.7 v minim u m al lo w a b l e v o l t a g e ra ng e . the uv l o c i r c ui t i n cl udes 55mv o f h y st er esis t o p r e v en t o s cil l a t ion a t t h e uvl o th r e s h o l d . short - circ uit pro t ec tio n an d r e c o ver y w h e n s t ar t i ng up or w h e n t h e output i s s h or t c i rc u i te d, t h e l o w vo lt age d r op a c r o ss t h e s y nc h r onou s re c t i f i e r m a y a l l o w t h e ind u c t o r c u r r en t t o r u n a w a y be ca us e i t r i s e s mo r e d u r i n g the o n tim e th a n i t falls d u ri n g th e o f f ti m e . t o p r o t e c t a g a i n s t th i s , th e ad p3051 a u t o ma t i cal l y ini t ia t e s a f r eq uenc y f o ld bac k o p era t ion w h e n t h e v o l t a g e a t f b dr o p s b e lo w 0 . 3 v , al lo win g th e ad p3051 t o ma in t a in co n t rol o f th e in d u c t o r c u r r en t un der t h es e condi t i o n s. w h en o p era t i n g a t hig h er in p u t v o l t a g es (fo r exa m ple , f r o m a 5 v b u s), th e ad p3051 ma y exhib i t o u t p u t v o l t a g e o v ers h o o t up on s t ar tup or af te r rel e a s e of an ove r l o a d c o n d i t i o n ( s e e f i gur e 9). i n s u c h cas e s, th e ADP3051 s limi t e d co mp s l e w ra te c a n sl ow it s re c o ve r y a s t h e output a p pro a che s re g u l a t i o n , al lo win g t h e o u t p u t v o l t a g e t o o v ers h o o t. i f o v ers h o o t ca nn o t b e t o le ra t e d in a n a p plica t io n , t h e c o mp v o l t a g e ca n b e limi t e d b y p l acin g a z e n e r dio d e f r o m co mp t o gnd , as s h o w n in f i gu r e 1 9 . ADP3051 6 comp cmpz4683-adc 04768-0-023 f i g u re 19. c o m p z e ner cl amp t o pr ev ent shor t- ci r c ui t reco ver y o u tput v o l t a g e o v ersho o t
ADP3051 rev. 0 | page 11 of 16 appli c a t ions r e co m m e n d e d co m p o n e n t s e x ter n a l co m p on e n t s e le c t io n fo r t h e a p plic a t i o n cir c ui t sh ow n in f i gur e 20 de p e nds o n t h e lo ad c u r r en t r e q u i r em e n ts. c e r t a i n t r ade o f f s b e twe e n dif f er en t p e r f o r ma n c e p a ram e t e rs can als o b e made . r e co mmen de d ext e r n al co m p on e n t va l u es a r e g i v e n i n ta b l e 4 . 04768-0-018 ADP3051 in 43 5 6 2 7 8 gnd shdn pgnd sw fb comp l c in v in c2 c1 c out v out r c r b r a f i gure 20. t y pic a l a p plic at ion cir c u i t design procedure f o r a p plica t ion s w h er e sp e c if ic p e r f o r ma n c e is r e q u ir e d , co m - p o ne n t c o mb i n a t i o ns ot he r t h a n t h o s e l i ste d i n t a bl e 4 m a y b e more a ppropr i ate. a d e s i g n pro c e d u r e f o r s e l e c t i n g t h e c o m p o - n e n t s is p r o v id e d in t h e fol l o w i n g s e c t io n s . setting th e output voltage the r e gu l a t e d ou t p u t v o l t a g e o f th e ad p3051 is s e t b y s e lec t ing t h e r e sis t i v e v o l t a g e di vi der fo rm e d b y r a a nd r b (see f i gur e 21). th e v o l t a g e divider dr o p s t h e o u t p ut v o l t a g e t o t h e v o l t a g e a t fb b y t h e e q u a t i o n ? ? ? ? ? ? + = b a fb out r r v v 1 w h er e v ou t is t h e o u t p ut v o l t a g e a n d v fb is t h e 0.8 v f eed back r e gula ti o n th r e s h o l d . r b co n t r o ls t h e v o l t a g e div i der c u r r en t, i di v , which is cal c u l a t e d b y b fb div r v i = u s in g hig h er divider c u r r en t i n cr e a s e s acc u rac y d u e t o t h e 5 na fb in p u t b i as c u r r en t. w i t h r b = 100 k?, th e acc u rac y is deg r ade d b y 0.0625%. fo r a g i v e n r b , ch o o s e t h e va l u e o f r a to s e t t h e out p ut volt ag e by t h e e q u a t i on ? ? ? ? ? ? ? = 1 fb out b a v v r r 04768-0-019 ADP3051 ref error amplifier 5 6 fb comp r c r b r a c1 c2 v out g m f i g u re 21. t y pic a l compens a t i on net w ork ta ble 4. r e com m en de d ext e r n a l compo n e n t s for po pula r in put / out p ut vo lt a g e condi t i ons (based on i lo ad = 50 0 ma max and a 60 khz crossover frequency) v in v out l (h) c out (f) c in (f) r a (k?) r b (k?) r c (k?) c1 (pf) c2 (pf) 2.5 1.0 6.8 10 10 2.5 10 4.7 470 47 1.8 6.8 10 10 12.5 10 10 270 27 3.6 1.0 6.8 10 10 2.5 10 4.7 470 47 1.8 8.2 10 10 12.5 10 10 270 27 2.5 8.2 10 10 21.3 10 15 180 18 5.0 1.0 8.2 10 10 2.5 10 5.7 470 47 1.8 10 10 10 12.5 10 10 270 27 2.5 10 10 10 21.3 10 15 180 18 3.3 12 10 10 31.3 10 18 150 15
ADP3051 rev. 0 | page 12 of 16 inducto r sel e c t ion the ad p3051 s hig h s w i t c h in g f r eq uen c y al lo ws th e us e o f a p h ys i c all y s m all i n d u ct o r . th e in d u ct o r ri p p l e cu rr e n t i s d e t e r- mi n e d b y () l f v v v v i sw in out in out l ? = ? w h er e ? i l i s th e peak- t o-peak i n d u ct o r ri p p l e cu rr e n t a n d f sw is th e s w i t c h in g f r e q uen c y . a s a guide l in e , t h e ind u c t o r p e ak-t o- p e ak c u r r en t r i pple is typ i cal l y s e t t o b e o n e-t h ir d t h e maxi m u m dc lo ad c u r r en t. u s in g t h i s guid e l i n e and s o lv ing fo r l , () () max load sw in out in out i f v v v v l ? = 3 s i m p li f y in g f o r th e kn o w n co n s ta n t s () ) ( h 5 max load in out in out i v v v v l ? = i t is im p o r t an t to en s u r e t h a t t h e ind u c t o r is c a p a b l e o f ha n d l i n g t h e maxi m u m p e ak i n d u c t o r c u r r en t, i lp k , d e t e r m i n e d b y () ? ? ? ? ? ? ? + = 2 l max load lpk i i i f i nal l y , th e ADP3051 s in t e r n al s l o p e co m p en s a tio n is desig n e d t o en sur e st ab i l i t y o f t h e inn e r c u r r en t m o de con t r o l lo o p when t h e i n d u c t o r is ch os en s o t h a t t h e do wn-slo p e o f t h e i n d u c t o r c u r r en t is les s tha n 320 ma/s s / ma 320 out v l outpu t c a p a c i t o r se lec t ion the o u t p u t ca p a ci t o r sh o u ld b e ch os en t o me et o u t p u t v o lt a g e r i p p le r e q u ir emen ts fo r t h e a p pl ica t ion. o u t p u t v o l t a g e r i p p le is a f u n c t i on o f t h e ind u c t o r r i p p l e c u r r en t a nd t h e im p e dan c e o f t h e o u t p ut c a p a ci t o r a t t h e s w i t chin g f r e q ue n c y . th e ma g n i t ude o f th e ca pa c i ti v e i m ped a n c e i s sw out cout f c x = 2 1 f o r ca p a ci t o rs wi t h r e l a tiv e l y l a rg e ca p a ci tan c e o r hig h eq ui valen t s e r i es r e sis t a n c e (es r ), e . g., tan t al u m o r e l ec tr ol ytic ca p a c i t o rs, t h e es r do mi na t e s t h e i m p e dan c e a t t h e s w i t chin g f r e q uen c y ; t h er efo r e , t h e o u t p ut r i p p le v o l t a g e i s ma inly a f u n c - tio n o f es r . i n this cas e , th e o u t p u t c a p a ci to r s h o u ld be ch os en b a s e d o n t h e esr b y t h e e q u a t i o n l ripple cout i v esr ? w h er e v r i ppl e is th e p e ak-t o-p e ak o u t p u t r i p p le v o l t a g e and esr co u t is th e ou t p u t c a p a ci t o r es r . f o r ca p a ci t o rs wi t h r e l a - ti v e l y s m all ca pa ci ta n c e a n d/ o r r e s i s t a n ce , th e ca pa ci t a n c e do mina t e s t h e ou t p ut v o l t a g e r i p p le . i n t h is c a s e , ch o o s e t h e o u t p u t c a p a ci t o r b y th e c a p a ci t a n c e usin g the e q ua t i o n () ripple sw in out v l f v c 2 2 out sw l out v f i c ? ? 8 m u l t ila y er ceramic (ml c ), ta n t al um, os-con, o r simila r lo w es r c a p a ci t o rs a r e r e co mm e n de d . t a b l e 5 lists s o me v e n d o r s tha t ma k e s u i t ab le c a p a ci t o rs. ta ble 5. ca pa ci t o r suppli e rs manufacturer capacitor type contact info avx t a ntalum www. avxc orp.c o m m u rata m l cc www.murata.c o m sanyo os-con www. sanyovid e o .com t a iyo-yud e n m l cc www.t-yud en.com inp u t ca pa cit o r sele ction the in p u t ca p a c i t o r r e d u ces in p u t v o l t a g e r i p p le ca us e d b y s w i t c h cu rr e n t s . s e l e ct a n in p u t c a pa ci t o r ca pa b l e o f w i th s t a n d - in g t h e r m s in pu t c u r r en t () in out in out max load rms cin v v v v i i ? ) ( ) ( w h er e i ci n ( rm s ) i s th e r m s r i p p le ra tin g o f t h e in p u t c a p a ci t o r . a s wi t h t h e o u t p u t ca p a c i t o r , a lo w es r c a p a ci t o r is r e co mm ende d to he lp to mi n i mi z e i n put volt age r i ppl e . compens a tion design the ad p3051 s ext e r n al co m p en s a tion n e tw o r k al lo ws desig n - e r s t o ea s i l y o p ti m i z e th e pa r t s pe rf o r m a n c e f o r a pa r t i c ul a r ap p l i c at i o n w i t h j u s t a s e r i e s r c n e t w o r k ( r c and c1 o f f i gur e 21) f r o m co mp t o gnd typ i cal l y r e q u ir ed t o c o m p e n s a te t h e re g u l a tor . the dc lo o p ga in is g i v e n b y th e eq u a tio n cs out load oea ea fb vdc r v r r g v a = w h er e: v fb i s th e f e e d b a c k v o l t a g e r e gu la ti o n th r e s h o l d , 0. 8 v . g ea is t h e er r o r a m plif ier t r a n s c o n d u c t an ce , 32 0 s. r oe a is t h e er r o r a m plif ier o u t p ut im p e dan c e (10 m?). r cs is t h e 2.9 ? c u r r en t s e n s e gain. r loa d is th e e q uivalen t o u t p u t r e sis t a n ce , eq ual to th e o u t p u t v o l t a g e divide d b y t h e lo ad c u r r en t.
ADP3051 rev. 0 | page 13 of 16 the sys t e m has t h r e e p o les a nd a zer o t h a t do mina te i t s f r e - q u en c y r e s p o n s e . the f i rs t co m p en s a t i o n p o le is g i v e n b y 1 2 1 1 c r f oea pc = t h e o u t p u t po l e i s gi v e n b y out load pout c r f = 2 1 i f us ed , th e o p tio n al s e con d com p en s a tion p o l e is g i v e n b y 2 2 1 2 c r f c pc = f i nal l y , th e zer o ca n be calc u l a t ed as 1 2 1 c r f c zc = n o t e tha t t h e dc lo o p ga in is the in v e rs e o f t h e ou t p u t lo ad c u r r en t, w h i l e t h e o u t p ut p o le , f po u t , i s prop or t i on a l to t h e l o a d c u r r e n t . t h u s , t h e c r o s s o ve r f r e q u e nc y , w h i c h i s prop or t i on a l to t h e p r o d uc t o f t h e dc lo o p ga i n a nd t h e o u t p u t p o le f r e q uen c y , re m a i n s t h e s a me. t o ch o o s e t h e c o m p en s a tion com p on en ts, f i rs t c h o o s e t h e r e gu la t o r lo o p c r os s o v e r f r e q uen c y (t h e f r e q ue n c y w h er e t h e l o op g a i n d rop s to 1 v / v or 0 d b ) . t o d e te r m i n e t h e d e s i re d cr os s o v e r f r eq uen c y , c h os e i t f o r a b o u t on e-t e n t h o f th e s w i t c h - i n g f r e q u e nc y o r 6 0 k h z . t h e re qu i r e d c o m p e n s a t i on re s i stor , r c , ca n be d e t e rm in ed f r o m t h e eq ua ti o n ea ref out cs out c c g v c r v f r = 2 w h er e f c is the cr os s o v e r f r eq uen c y . t o mak e sur e th e p h as e ma rg in is s u i t a b le , c h o o s e t h e f i rs t co m p en s a tion c a p a ci t o r t o se t th e ze r o f r eq ue n c y t o o n e - f o ur th th e cr os so v e r f r eq ue n c y , o r c c r f c = 2 4 1 an o p tio n al s e c o nd co m p en s a tio n c a p a ci t o r r e d u ces the hig h f r eq uen c y ga in to r e d u ce the hig h f r eq uen c y n o is e . i f us ed , c h o o s e t h e s e cond co m p en s a tion c a p a ci t o r t o s e t th e s e cond co m p en s a t i o n p o le t o th e s w i t chin g f r eq uen c y , o r c sw r f c = 2 1 2 circuit bo ard l a y o u t c o nsi d er a t io ns a g o o d cir c ui t bo a r d l a yo u t a i ds in extrac tin g th e m o s t p e r f or m a nc e f rom t h e a d p 3 0 5 1 . p o or c i rc u i t l a y o ut d e g r a d e s t h e o u t p ut r i p p le a nd t h e e l e c t r o m a g n e t i c i n t e r f er en ce (emi) o r e l ec tr o m a g n e tic co m p a t ib ili t y (em c ) p e r f o r m a n c e . t h e e v a l u a t i o n b o ard l a y o ut of f i g u re 2 4 i s opt i m i z e d f o r t h e ad p3051. u s e this la yo u t f o r bes t p e r f o r ma n c e . i f this la yo u t n e e d s cha n g i n g , us e t h e fol l o w i n g guide l i n es: 1. u s e s e p a ra te a n alog a n d p o w e r g r o u n d pl an es. c o nn e c t t h e s e n s i t i v e a n alog cir c ui tr y (s uc h as co m p en s a tion an d v o l t - a g e di vider co m p o n en ts) t o a n a l og g r o u n d ; co nn ec t t h e p o w e r co m p on en ts (s uc h as in p u t an d o u t p u t b y p a s s c a p a c i tor s ) to p o we r g rou nd. c o n n e c t t h e t w o g rou nd plan es t o g e t h er n e a r t h e lo ad t o r e d u ce t h e ef fe c t s o f vo lt age d ropp e d on c i rc u i t b o ard t r a c e s . 2. loca t e c in as cl os e t o t h e i n p i n as p o s s i b le , and us e s e p a - ra t e in p u t b y pa s s c a pa ci t o r s f o r th e a n al og a n d po w e r gr o u n d s in d i ca t e d in g u id e l in e 1. 3. ro u t e t h e hig h c u r r en t p a t h f r o m c in , th r o u gh l , t o th e sw a nd pg nd pin s as sh o r t as p o ss i b le. 4. ro u t e t h e hig h c u r r en t p a t h f r o m c in t h rou g h l an d c ou t as sh o r t as p o ssib le. 5. k e ep hig h c u r r en t t r aces as sh o r t a nd as wi de as p o ssi b le. 6. p l ace t h e fe e d b a ck r e sis t o r s as clos e as p o s s ib le to t h e fb pi n to pr e v e n t n o i s e pi c k u p . 7. p l ace t h e com p en s a tion com p on en ts as c l os e as p o s s i b le t o th e c o mp p i n . 8. a v o i d r o u t i n g h i g h i m p e dance t r aces, such as f b a nd co mp , n e a r th e hig h c u r r en t tr aces an d com p on en ts o r ne ar t h e s w i t c h no d e ( s w ) . 9. i f hig h i m p e dance t r aces a r e r o u t e d n e a r hig h c u r r en t a nd/o r t h e s w n o d e , place a g r o u n d plan e shield b e tw e e n th e tra c e s .
ADP3051 rev. 0 | page 14 of 16 04768-0-024 f i g u re 22. s a mp le a p plic at i o n c i rcu i t boa r d l a yout ( s ilk s c r e en l a yer) 04768-0-026 f i gure 23. s a mp le a p plic ati o n c i rcu i t boa r d l a yout ( t op layer) 04768-0-025 f i gure 24. s a mp le a p plic ati o n c i rcu i t boa r d l a yout (b ottom laye r)
ADP3051 rev. 0 | page 15 of 16 outline dimensions 0.80 0.60 0.40 8 0 4 85 4.90 bsc pin 1 0.65 bsc 3.00 bsc seating plane 0.15 0.00 0.38 0.22 1.10 max 3.00 bsc coplanarity 0.10 0.23 0.08 compliant to jedec standards mo-187aa f i g u re 25. 8-l e ad m i ni s m al l o u t l ine p a ck ag e [m sop ] (rm-8) di me nsio ns sho w n i n mi ll im e t e r s ordering guide model temperature r a nge package descri ption package outlin e branding ADP3051ar m z- reel7 1 C40c to +85c 8-lead mini sm a ll outline package [msop] rm-8 p3a 1 z = pb-free part.
ADP3051 rev. 0 | page 16 of 16 notes ? 2004 a n alo g devic e s, inc. all rig h ts res e rve d . t r ade m arks a n d re g i s - tered trade m arks are the property of their respective owners . d04768C0C 6/04(0)

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